This continuous exposure induces the dampening of T cell function, termed T cell exhaustion ( 1– 8). CD8 + T cells are exposed to persistent antigen and inflammatory signals during chronic infections and cancer. Kartik Lakshminarasimhan, M.S.CD8 + T cells are important in defense against viral infections and cancer. 2021, UConn (PhD Student at Stanford University) Shaoyi Huang (Ph.D., co-major-advisor with.To learn more about the research projects and highlights from past summers, visit the I am the principal investigator for the NSF REU Site on Trustable Embedded Systems Security. Research Experiences for Undergraduates (REU) DARSIM: A parallel cycle-level NoC Simulator, MoBS'10 Download Link.A Cycle-level Multithreaded Multicore Simulator for the 1000-core Era, TCAD'12, ISPASS'11 Download Link.CRONO: A Benchmark Suite for Multithreaded Graph Algorithms Executing on Futuristic Multicores, IISWC'15 Download Link.HeteroMap: A Runtime Performance Predictor for Efficient Processing of Graph Analytics on Heterogeneous Multi-Accelerators, ISPASS'19 Download Link.MergePath-SpMM: Parallel Sparse Matrix-Matrix Algorithm for Graph Neural Network Acceleration, ISPASS'23 Download Link.The focus of this reseaerch is to build architectural mechanisms and protocols that exploit application through hardware layers to co-optimize processor resiliency and efficiency. This research aims to address these challenges by devising methods to secure parallel processors, while meeting the efficiency and responsiveness expectations of the system. Moreover, with the advent of confidential computing, the authenticity of sensitive code execution requires fast remote attestations. Virtualization technologies expose hardware resources, thus requiring strong isolation and obfuscation guarantees for security. Architecture for High Performance Power Electronics –Ĭomputer systems have recently seen a rise of malicious exploits on processor hardware.ICCD'22 GNNs on Quantum – You can view the special session’s The objective of this research is to explore both hardware and software parallelism challenges holistically, characterize key bottlenecks, and explore architectural methods that improve performance, lower energy, and lower programmer effort. Many emerging applications comprise real-time automated processing, interpretation, and intelligent decisions using large volumes of input data, while simultaneously decreasing the time necessary to arrive at a decision. I enjoy simulating and building architecture prototypes. My current research deals with hardware–software mechanisms for parallelism, security, and resiliency of future parallel computer architectures. My research interests can be generalized to the field of Computer Architecture and Systems. I am recruiting PhD students to work on parallel and secure computer architectures. We presented a Special Session on Algorithm–Hardware Co-Design for Graph Neural Networks –Ģ023 NSF REU Site on Trustable Embedded Systems Security will host 11 undergraduate students from May 28 to Augto work on cutting-edge research in computer systems security and trustable computing systems at the University of Connecticut We open source the MergePath-SpMM sparse matrix-matrix kernel for Graph Neural Network acceleration – Before joining academia, he designed microprocessors at leading semiconductor companies, Motorola and Intel. from the University of Massachusetts Amherst. Prior to joining UConn, Khan was a Postdoctoral Research Scientist at the Massachusetts Institute of Technology. He holds the Castleman Term Professorship in Engineering Innovation, and serves as an Associate Director of Connecticut Advanced Computing Center (CACC). Omer Khan is an Associate Professor of Electrical and Computer Engineering at the University of Connecticut.
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